Navigating registers in placement for clock network minimization

Yongqiang Lu, Cliff C. N. Sze, Xianlong Hong, Qiang Zhou, Yici Cai, Liang Huang, Jiang Hu. Navigating registers in placement for clock network minimization. In William H. Joyner Jr., Grant Martin, Andrew B. Kahng, editors, Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005. pages 176-181, ACM, 2005. [doi]

Abstract

Abstract is missing.