Novel smart card SoC memory architecture based on embedded STT-MRAM

Kaiwen Lu, Fengze Yan, Xingjie Liu, Dongsheng Liu, Peng Liu, Bo Liu. Novel smart card SoC memory architecture based on embedded STT-MRAM. In 13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, October 29 - November 1, 2019. pages 1-4, IEEE, 2019. [doi]

Authors

Kaiwen Lu

This author has not been identified. Look up 'Kaiwen Lu' in Google

Fengze Yan

This author has not been identified. Look up 'Fengze Yan' in Google

Xingjie Liu

This author has not been identified. Look up 'Xingjie Liu' in Google

Dongsheng Liu

This author has not been identified. Look up 'Dongsheng Liu' in Google

Peng Liu

This author has not been identified. Look up 'Peng Liu' in Google

Bo Liu

This author has not been identified. Look up 'Bo Liu' in Google