Simon Lutz, Daniel Neider, Rajarshi Roy 0002. Specification Sketching for Linear Temporal Logic. In Étienne André, Jun Sun 0001, editors, Automated Technology for Verification and Analysis - 21st International Symposium, ATVA 2023, Singapore, October 24-27, 2023, Proceedings, Part II. Volume 14216 of Lecture Notes in Computer Science, pages 26-48, Springer, 2023. [doi]
Abstract is missing.