Arun M, Madhav Rao. Resource-Efficient DSP Slice for Embedded FPGAs Using Split-Posit Arithmetic. In Fan Chen 0001, Peipei Zhou 0001, Jie Gu 0001, Amit Ranjan Trivedi, Xiaoxuan Yang 0001, editors, Proceedings of the Great Lakes Symposium on VLSI 2026, GLSVLSI 2026, Canandaigua, NY, USA, June 22-24, 2026. pages 870-875, ACM, 2026. [doi]
Abstract is missing.