A 5-10-Gb/s 12.5-mW Source Synchronous I/O Interface With 3-D Flip Chip Package

Shunli Ma, Hao Yu 0001, Qun Jane Gu, Junyan Ren. A 5-10-Gb/s 12.5-mW Source Synchronous I/O Interface With 3-D Flip Chip Package. IEEE Trans. on Circuits and Systems, 66-I(2):555-568, 2019. [doi]

Abstract

Abstract is missing.