An Efficient Hardware Accelerator for JPEG-AI Image Compression on FPGA - researchr publication authors

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Weize Ma, Sen Gao, Siyuan Leng, Tong Chen 0004, Ming Lu 0003, Zhan Ma 0001, Jun Lin. An Efficient Hardware Accelerator for JPEG-AI Image Compression on FPGA. In IEEE International Symposium on Circuits and Systems, ISCAS 2026, Shanghai, China, May 24-28, 2026. pages 254-258, IEEE, 2026. [doi]

This author has not been identified. Look up 'Weize Ma' in GoogleThis author has not been identified. Look up 'Sen Gao' in GoogleThis author has not been identified. Look up 'Siyuan Leng' in GoogleThis author has not been identified. Look up 'Tong Chen 0004' in GoogleThis author has not been identified. Look up 'Ming Lu 0003' in GoogleThis author has not been identified. Look up 'Zhan Ma 0001' in GoogleThis author has not been identified. Look up 'Jun Lin' in Google

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