An Efficient Hardware Accelerator for JPEG-AI Image Compression on FPGA

Weize Ma, Sen Gao, Siyuan Leng, Tong Chen 0004, Ming Lu 0003, Zhan Ma 0001, Jun Lin. An Efficient Hardware Accelerator for JPEG-AI Image Compression on FPGA. In IEEE International Symposium on Circuits and Systems, ISCAS 2026, Shanghai, China, May 24-28, 2026. pages 254-258, IEEE, 2026. [doi]

Abstract

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