Yufei Ma, Naveen Suda, Yu Cao, Sarma B. K. Vrudhula, Jae-sun Seo. ALAMO: FPGA acceleration of deep learning algorithms with a modularized RTL compiler. Integration, 62:14-23, 2018. [doi]
@article{MaSCVS18,
title = {ALAMO: FPGA acceleration of deep learning algorithms with a modularized RTL compiler},
author = {Yufei Ma and Naveen Suda and Yu Cao and Sarma B. K. Vrudhula and Jae-sun Seo},
year = {2018},
doi = {10.1016/j.vlsi.2017.12.009},
url = {https://doi.org/10.1016/j.vlsi.2017.12.009},
researchr = {https://researchr.org/publication/MaSCVS18},
cites = {0},
citedby = {0},
journal = {Integration},
volume = {62},
pages = {14-23},
}