Formal verification of digital systems by automatic reduction of data paths

Enrico Macii, Bernard Plessier, Fabio Somenzi. Formal verification of digital systems by automatic reduction of data paths. IEEE Trans. on CAD of Integrated Circuits and Systems, 16(10):1136-1156, 1997. [doi]

@article{MaciiPS97:0,
  title = {Formal verification of digital systems by automatic reduction of data paths},
  author = {Enrico Macii and Bernard Plessier and Fabio Somenzi},
  year = {1997},
  doi = {10.1109/43.662676},
  url = {http://doi.ieeecomputersociety.org/10.1109/43.662676},
  tags = {data-flow},
  researchr = {https://researchr.org/publication/MaciiPS97%3A0},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {16},
  number = {10},
  pages = {1136-1156},
}