Block-Parallel Systolic-Array Architecture for 2-d NTT-Based Fragile Watermark Embedding

Arjuna Madanayake, Renato J. Cintra, Vassil S. Dimitrov, Leonard T. Bruton. Block-Parallel Systolic-Array Architecture for 2-d NTT-Based Fragile Watermark Embedding. Parallel Processing Letters, 22(3), 2012. [doi]

Authors

Arjuna Madanayake

This author has not been identified. Look up 'Arjuna Madanayake' in Google

Renato J. Cintra

This author has not been identified. Look up 'Renato J. Cintra' in Google

Vassil S. Dimitrov

This author has not been identified. Look up 'Vassil S. Dimitrov' in Google

Leonard T. Bruton

This author has not been identified. Look up 'Leonard T. Bruton' in Google