Arjuna Madanayake, Renato J. Cintra, Vassil S. Dimitrov, Leonard T. Bruton. Block-Parallel Systolic-Array Architecture for 2-d NTT-Based Fragile Watermark Embedding. Parallel Processing Letters, 22(3), 2012. [doi]
@article{MadanayakeCDB12, title = {Block-Parallel Systolic-Array Architecture for 2-d NTT-Based Fragile Watermark Embedding}, author = {Arjuna Madanayake and Renato J. Cintra and Vassil S. Dimitrov and Leonard T. Bruton}, year = {2012}, doi = {10.1142/S0129626412500090}, url = {http://dx.doi.org/10.1142/S0129626412500090}, researchr = {https://researchr.org/publication/MadanayakeCDB12}, cites = {0}, citedby = {0}, journal = {Parallel Processing Letters}, volume = {22}, number = {3}, }