A Security-Aware Pre-partitioning Technique for 3D Integrated Circuits

Siroos Madani, Magdy Bayoumi. A Security-Aware Pre-partitioning Technique for 3D Integrated Circuits. In 18th International Workshop on Microprocessor and SOC Test and Verification, MTV 2017, Austin, TX, USA, December 11-12, 2017. pages 57-61, IEEE Computer Society, 2017. [doi]

@inproceedings{MadaniB17-1,
  title = {A Security-Aware Pre-partitioning Technique for 3D Integrated Circuits},
  author = {Siroos Madani and Magdy Bayoumi},
  year = {2017},
  doi = {10.1109/MTV.2017.20},
  url = {http://doi.ieeecomputersociety.org/10.1109/MTV.2017.20},
  researchr = {https://researchr.org/publication/MadaniB17-1},
  cites = {0},
  citedby = {0},
  pages = {57-61},
  booktitle = {18th International Workshop on Microprocessor and SOC Test and Verification, MTV 2017, Austin, TX, USA, December 11-12, 2017},
  publisher = {IEEE Computer Society},
  isbn = {978-1-5386-3351-9},
}