Abstract is missing.
- A Unified UVM Architecture for Flash-Based MemoryKhaled Salah. 1-4 [doi]
- SequenceLanguage: A Constraint Random MP-RIS Generation FrameworkMadhukarreddy Pappireddy, Bipin Ravi. 5-9 [doi]
- Maintaining ISA Specifications in MicroTESK Test Program GeneratorMikhail M. Chupilko, Alexander Kamkin, Artem Kotsynyak, Alexander Protsenko, Sergey A. Smolov, Andrei Tatarnikov. 10-14 [doi]
- Automation of Processor Verification Using Recurrent Neural NetworksMartin Fajcik, Pavel Smrz, Marcela Zachariásová. 15-20 [doi]
- Anvil: Best in Class Multiprocessor Coherency Verification ToolKaushik Gopalakrishnan, Bipin Ravi. 21-25 [doi]
- Dynamic Exerciser Template Weighting in x86 Processor VerificationAhmed Wahba, Justin Hohnerlein, Farhan Rahman, Li-C. Wang. 26-31 [doi]
- Validation of Context Preserving Thread-Level Speculative Execution Using N-Queens: Comparison of Non-CPSE and CPSE-enabled ApplicationsJack Lawrence Mason. 32-34 [doi]
- TLM Virtual Platform for Fast and Accurate Power EstimationAhmed Abdel-Haleem, Magdy A. El-Moursy. 35-38 [doi]
- Electromagnetic (EM) Crosstalk Failures and Symptoms in SoC DesignsAnand Raman, Yorgos Koutsoyannopoulos, Magdy Abadir. 39-44 [doi]
- iPUF: Interconnect PUF with Self-Masking Circuit for Performance EnhancementLiting Yu, Xiaoxiao Wang, Fahim Rahman, Mark Tehranipoor. 45-50 [doi]
- Hardware-Assisted Cybersecurity for IoT DevicesFahim Rahman, Mohammad Farmani, Mark Tehranipoor, Yier Jin. 51-56 [doi]
- A Security-Aware Pre-partitioning Technique for 3D Integrated CircuitsSiroos Madani, Magdy Bayoumi. 57-61 [doi]
- Identifying and Measuring Security Critical Path for Uncovering Circuit VulnerabilitiesWei Hu, Armaiti Ardeshiricham, Ryan Kastner. 62-67 [doi]
- Modeling and Analysis of Secure Processor Extensions Based on Actor NetworksMark Nelson, Peter-Michael Seidel. 68-73 [doi]