A 2.5-GHz, 6.9-mW, 45-nm-LP CMOS, ΔΣ Modulator Based on Standard Cell Design With Time-Interleaving

Paolo Madoglio, Ashoke Ravi, Luis Cuellar, Stefano Pellerano, Parmoon Seddighrad, Ismael Lomeli, Yorgos Palaskas. A 2.5-GHz, 6.9-mW, 45-nm-LP CMOS, ΔΣ Modulator Based on Standard Cell Design With Time-Interleaving. J. Solid-State Circuits, 45(7):1410-1420, 2010. [doi]

@article{MadoglioRCPSLP10,
  title = {A 2.5-GHz, 6.9-mW, 45-nm-LP CMOS, ΔΣ Modulator Based on Standard Cell Design With Time-Interleaving},
  author = {Paolo Madoglio and Ashoke Ravi and Luis Cuellar and Stefano Pellerano and Parmoon Seddighrad and Ismael Lomeli and Yorgos Palaskas},
  year = {2010},
  doi = {10.1109/JSSC.2010.2048086},
  url = {http://dx.doi.org/10.1109/JSSC.2010.2048086},
  researchr = {https://researchr.org/publication/MadoglioRCPSLP10},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {45},
  number = {7},
  pages = {1410-1420},
}