VeriIntel2C: Abstracting RTL to C to maximize High-Level Synthesis Design Space Exploration

Anushree Mahapatra, Benjamin Carrión Schäfer. VeriIntel2C: Abstracting RTL to C to maximize High-Level Synthesis Design Space Exploration. Integration, 64:1-12, 2019. [doi]

@article{MahapatraS19,
  title = {VeriIntel2C: Abstracting RTL to C to maximize High-Level Synthesis Design Space Exploration},
  author = {Anushree Mahapatra and Benjamin Carrión Schäfer},
  year = {2019},
  doi = {10.1016/j.vlsi.2018.03.011},
  url = {https://doi.org/10.1016/j.vlsi.2018.03.011},
  researchr = {https://researchr.org/publication/MahapatraS19},
  cites = {0},
  citedby = {0},
  journal = {Integration},
  volume = {64},
  pages = {1-12},
}