Hardware design and verification techniques for Giga-bit Forward-Error Correction systems on FPGAs

Ahmed Mahdi, Panagiotis Sakellariou, Nikos Kanistras, Ioannis Tsatsaragkos, Vassilis Paliouras. Hardware design and verification techniques for Giga-bit Forward-Error Correction systems on FPGAs. In 19th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2012, Seville, Spain, December 9-12, 2012. pages 89-92, IEEE, 2012. [doi]

Authors

Ahmed Mahdi

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Panagiotis Sakellariou

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Nikos Kanistras

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Ioannis Tsatsaragkos

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Vassilis Paliouras

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