Sachin Maheshwari, Himadri Singh Raghav, Anu Gupta. Characterization of Logical Effort for Improved Delay. In Manoj Singh Gaur, Mark Zwolinski, Vijay Laxmi, Dharmendra Boolchandani, Virendra Singh, Adit D. Singh, editors, VLSI Design and Test, 17th International Symposium, VDAT 2013, Jaipur, India, July 27-30, 2013, Revised Selected Papers. Volume 382 of Communications in Computer and Information Science, pages 108-117, Springer, 2013. [doi]
@inproceedings{MaheshwariRG13,
title = {Characterization of Logical Effort for Improved Delay},
author = {Sachin Maheshwari and Himadri Singh Raghav and Anu Gupta},
year = {2013},
doi = {10.1007/978-3-642-42024-5_14},
url = {http://dx.doi.org/10.1007/978-3-642-42024-5_14},
researchr = {https://researchr.org/publication/MaheshwariRG13},
cites = {0},
citedby = {0},
pages = {108-117},
booktitle = {VLSI Design and Test, 17th International Symposium, VDAT 2013, Jaipur, India, July 27-30, 2013, Revised Selected Papers},
editor = {Manoj Singh Gaur and Mark Zwolinski and Vijay Laxmi and Dharmendra Boolchandani and Virendra Singh and Adit D. Singh},
volume = {382},
series = {Communications in Computer and Information Science},
publisher = {Springer},
isbn = {978-3-642-42024-5},
}