Sachin Maheshwari, Himadri Singh Raghav, Anu Gupta. Characterization of Logical Effort for Improved Delay. In Manoj Singh Gaur, Mark Zwolinski, Vijay Laxmi, Dharmendra Boolchandani, Virendra Singh, Adit D. Singh, editors, VLSI Design and Test, 17th International Symposium, VDAT 2013, Jaipur, India, July 27-30, 2013, Revised Selected Papers. Volume 382 of Communications in Computer and Information Science, pages 108-117, Springer, 2013. [doi]
Abstract is missing.