Architecture and circuit techniques for a 1.1-GHz 16-kb reconfigurable memory in 0.18-/spl mu/m CMOS

Ken Mai, Ron Ho, Elad Alon, Dean Liu, Younggon Kim, Dinesh Patil, Mark A. Horowitz. Architecture and circuit techniques for a 1.1-GHz 16-kb reconfigurable memory in 0.18-/spl mu/m CMOS. J. Solid-State Circuits, 40(1):261-275, 2005. [doi]

@article{MaiHALKPH05,
  title = {Architecture and circuit techniques for a 1.1-GHz 16-kb reconfigurable memory in 0.18-/spl mu/m CMOS},
  author = {Ken Mai and Ron Ho and Elad Alon and Dean Liu and Younggon Kim and Dinesh Patil and Mark A. Horowitz},
  year = {2005},
  doi = {10.1109/JSSC.2004.837992},
  url = {https://doi.org/10.1109/JSSC.2004.837992},
  researchr = {https://researchr.org/publication/MaiHALKPH05},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {40},
  number = {1},
  pages = {261-275},
}