A Low-Cost Methodology for EM Fault Emulation on FPGA

Paolo Maistri, Jiayun Po. A Low-Cost Methodology for EM Fault Emulation on FPGA. In Cristiana Bolchini, Ingrid Verbauwhede, Ioana Vatajelu, editors, 2022 Design, Automation & Test in Europe Conference & Exhibition, DATE 2022, Antwerp, Belgium, March 14-23, 2022. pages 1185-1188, IEEE, 2022. [doi]

@inproceedings{MaistriP22,
  title = {A Low-Cost Methodology for EM Fault Emulation on FPGA},
  author = {Paolo Maistri and Jiayun Po},
  year = {2022},
  doi = {10.23919/DATE54114.2022.9774507},
  url = {https://doi.org/10.23919/DATE54114.2022.9774507},
  researchr = {https://researchr.org/publication/MaistriP22},
  cites = {0},
  citedby = {0},
  pages = {1185-1188},
  booktitle = {2022 Design, Automation & Test in Europe Conference & Exhibition, DATE 2022, Antwerp, Belgium, March 14-23, 2022},
  editor = {Cristiana Bolchini and Ingrid Verbauwhede and Ioana Vatajelu},
  publisher = {IEEE},
  isbn = {978-3-9819263-6-1},
}