Don t care filling for power minimization in VLSI circuit testing

Tapas K. Maiti, Santanu Chattopadhyay. Don t care filling for power minimization in VLSI circuit testing. In International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA. pages 2637-2640, IEEE, 2008. [doi]

Authors

Tapas K. Maiti

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Santanu Chattopadhyay

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