Don t care filling for power minimization in VLSI circuit testing

Tapas K. Maiti, Santanu Chattopadhyay. Don t care filling for power minimization in VLSI circuit testing. In International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA. pages 2637-2640, IEEE, 2008. [doi]

@inproceedings{MaitiC08,
  title = {Don t care filling for power minimization in VLSI circuit testing},
  author = {Tapas K. Maiti and Santanu Chattopadhyay},
  year = {2008},
  doi = {10.1109/ISCAS.2008.4541998},
  url = {http://dx.doi.org/10.1109/ISCAS.2008.4541998},
  tags = {testing},
  researchr = {https://researchr.org/publication/MaitiC08},
  cites = {0},
  citedby = {0},
  pages = {2637-2640},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA},
  publisher = {IEEE},
}