A 34fJ/conversion-step 10-bit 6.66MS/s SAR ADC with built-in digital calibration in 130nm CMOS

Felipe Makara, Lucas Mangini, André A. Mariano. A 34fJ/conversion-step 10-bit 6.66MS/s SAR ADC with built-in digital calibration in 130nm CMOS. In Jarbas A. N. Silveira, editor, Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, SBCCI 2017, Fortaleza - Ceará , Brazil, August 28 - September 01, 2017. pages 180-184, ACM, 2017. [doi]

@inproceedings{MakaraMM17,
  title = {A 34fJ/conversion-step 10-bit 6.66MS/s SAR ADC with built-in digital calibration in 130nm CMOS},
  author = {Felipe Makara and Lucas Mangini and André A. Mariano},
  year = {2017},
  doi = {10.1145/3109984.3110016},
  url = {http://doi.acm.org/10.1145/3109984.3110016},
  researchr = {https://researchr.org/publication/MakaraMM17},
  cites = {0},
  citedby = {0},
  pages = {180-184},
  booktitle = {Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, SBCCI 2017, Fortaleza - Ceará , Brazil, August 28 - September 01, 2017},
  editor = {Jarbas A. N. Silveira},
  publisher = {ACM},
  isbn = {978-1-4503-5106-5},
}