Power consumption optimization of 8 bit, 2 MHz voltage scaling subranging CMOS 0.5 μm DAC

Franco Maloberti, Roberto Rivoir, Guido Torelli. Power consumption optimization of 8 bit, 2 MHz voltage scaling subranging CMOS 0.5 μm DAC. In Proceedings of Third International Conference on Electronics, Circuits, and Systems, ICECS 1996, Rodos, Greece, October 13-16, 1996. pages 1162-1165, IEEE, 1996. [doi]

Abstract

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