Systolic Array Implementation of DFT with Reduced Multipliers Using Triple Matrix Product

I. Mamatha, Shikha Tripathi, T. S. B. Sudarshan, Nikhil Bhattar. Systolic Array Implementation of DFT with Reduced Multipliers Using Triple Matrix Product. In SIRS. pages 311-322, 2014. [doi]

@inproceedings{MamathaTSB14,
  title = {Systolic Array Implementation of DFT with Reduced Multipliers Using Triple Matrix Product},
  author = {I. Mamatha and Shikha Tripathi and T. S. B. Sudarshan and Nikhil Bhattar},
  year = {2014},
  doi = {10.1007/978-3-319-04960-1_28},
  url = {http://dx.doi.org/10.1007/978-3-319-04960-1_28},
  researchr = {https://researchr.org/publication/MamathaTSB14},
  cites = {0},
  citedby = {0},
  pages = {311-322},
  booktitle = {SIRS},
}