An optically-enabled chip-multiprocessor architecture using a single-level shared optical cache memory

P. Maniotis, Savvas Gitzenis, Leandros Tassiulas, Nikos Pleros. An optically-enabled chip-multiprocessor architecture using a single-level shared optical cache memory. Optical Switching and Networking, 22:54-68, 2016. [doi]

@article{ManiotisGTP16,
  title = {An optically-enabled chip-multiprocessor architecture using a single-level shared optical cache memory},
  author = {P. Maniotis and Savvas Gitzenis and Leandros Tassiulas and Nikos Pleros},
  year = {2016},
  doi = {10.1016/j.osn.2016.05.001},
  url = {http://dx.doi.org/10.1016/j.osn.2016.05.001},
  researchr = {https://researchr.org/publication/ManiotisGTP16},
  cites = {0},
  citedby = {0},
  journal = {Optical Switching and Networking},
  volume = {22},
  pages = {54-68},
}