Sandya S. Mannarswamy, Ramaswamy Govindarajan. Analyzing cache performance bottlenecks of STM applications and addressing them with compiler s help. In Valentina Salapura, Michael Gschwind, Jens Knoop, editors, 19th International Conference on Parallel Architecture and Compilation Techniques (PACT 2010), Vienna, Austria, September 11-15, 2010. pages 547-548, ACM, 2010. [doi]
@inproceedings{MannarswamyG10-0,
title = {Analyzing cache performance bottlenecks of STM applications and addressing them with compiler s help},
author = {Sandya S. Mannarswamy and Ramaswamy Govindarajan},
year = {2010},
doi = {10.1145/1854273.1854345},
url = {http://doi.acm.org/10.1145/1854273.1854345},
tags = {caching, compiler},
researchr = {https://researchr.org/publication/MannarswamyG10-0},
cites = {0},
citedby = {0},
pages = {547-548},
booktitle = {19th International Conference on Parallel Architecture and Compilation Techniques (PACT 2010), Vienna, Austria, September 11-15, 2010},
editor = {Valentina Salapura and Michael Gschwind and Jens Knoop},
publisher = {ACM},
isbn = {978-1-4503-0178-7},
}