A 640-Mb/s 2048-bit programmable LDPC decoder chip

Mohammad M. Mansour, Naresh R. Shanbhag. A 640-Mb/s 2048-bit programmable LDPC decoder chip. J. Solid-State Circuits, 41(3):684-698, 2006. [doi]

@article{MansourS06-1,
  title = {A 640-Mb/s 2048-bit programmable LDPC decoder chip},
  author = {Mohammad M. Mansour and Naresh R. Shanbhag},
  year = {2006},
  doi = {10.1109/JSSC.2005.864133},
  url = {https://doi.org/10.1109/JSSC.2005.864133},
  researchr = {https://researchr.org/publication/MansourS06-1},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {41},
  number = {3},
  pages = {684-698},
}