A system-level stochastic circuit generator for FPGA architecture evaluation - researchr publication authors

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Cindy Mark, Ava Shui, Steven J. E. Wilton. A system-level stochastic circuit generator for FPGA architecture evaluation. In Tarek A. El-Ghazawi, Yao-Wen Chang, Juinn-Dar Huang, Proshanta Saha, editors, 2008 International Conference on Field-Programmable Technology, FPT 2008, Taipei, Taiwan, December 7-10, 2008. pages 25-32, IEEE, 2008. [doi]

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