200 Gbps Hardware Accelerated Encryption System for FPGA Network Cards - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Zdenek Martinasek, Jan Hajny, David Smekal, Lukas Malina, Denis Matousek, Michal Kekely, Nele Mentens. 200 Gbps Hardware Accelerated Encryption System for FPGA Network Cards. In Chip-Hong Chip, Ulrich Rührmair, Daniel Holcomb, Jorge Guajardo, editors, Proceedings of the 2018 Workshop on Attacks and Solutions in Hardware Security, ASHES@CCS 2018, Toronto, ON, Canada, October 19, 2018. pages 11-17, ACM, 2018. [doi]

This author has not been identified. Look up 'Zdenek Martinasek' in GoogleThis author has not been identified. Look up 'Jan Hajny' in GoogleThis author has not been identified. Look up 'David Smekal' in GoogleThis author has not been identified. Look up 'Lukas Malina' in GoogleThis author has not been identified. Look up 'Denis Matousek' in GoogleThis author has not been identified. Look up 'Michal Kekely' in GoogleThis author has not been identified. Look up 'Nele Mentens' in Google

runs on WebDSL