200 Gbps Hardware Accelerated Encryption System for FPGA Network Cards

Zdenek Martinasek, Jan Hajny, David Smekal, Lukas Malina, Denis Matousek, Michal Kekely, Nele Mentens. 200 Gbps Hardware Accelerated Encryption System for FPGA Network Cards. In Chip-Hong Chip, Ulrich Rührmair, Daniel Holcomb, Jorge Guajardo, editors, Proceedings of the 2018 Workshop on Attacks and Solutions in Hardware Security, ASHES@CCS 2018, Toronto, ON, Canada, October 19, 2018. pages 11-17, ACM, 2018. [doi]

@inproceedings{MartinasekHSMMK18,
  title = {200 Gbps Hardware Accelerated Encryption System for FPGA Network Cards},
  author = {Zdenek Martinasek and Jan Hajny and David Smekal and Lukas Malina and Denis Matousek and Michal Kekely and Nele Mentens},
  year = {2018},
  doi = {10.1145/3266444.3266446},
  url = {https://doi.org/10.1145/3266444.3266446},
  researchr = {https://researchr.org/publication/MartinasekHSMMK18},
  cites = {0},
  citedby = {0},
  pages = {11-17},
  booktitle = {Proceedings of the 2018 Workshop on Attacks and Solutions in Hardware Security, ASHES@CCS 2018, Toronto, ON, Canada, October 19, 2018},
  editor = {Chip-Hong Chip and Ulrich Rührmair and Daniel Holcomb and Jorge Guajardo},
  publisher = {ACM},
  isbn = {978-1-4503-5996-2},
}