Synthesis techniques for CMOS folded source-coupled logic circuits

Sailesh R. Maskai, Sayfe Kiaei, David J. Allstot. Synthesis techniques for CMOS folded source-coupled logic circuits. J. Solid-State Circuits, 27(8):1157-1167, August 1992. [doi]

Authors

Sailesh R. Maskai

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Sayfe Kiaei

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David J. Allstot

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