The design of multiplierless FIR filters with a minimum adder step and reduced hardware complexity - researchr publication authors

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Douglas L. Maskell, Jussipekka Leiwo, Jagdish Chandra Patra. The design of multiplierless FIR filters with a minimum adder step and reduced hardware complexity. In International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece. IEEE, 2006. [doi]

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