The design of multiplierless FIR filters with a minimum adder step and reduced hardware complexity

Douglas L. Maskell, Jussipekka Leiwo, Jagdish Chandra Patra. The design of multiplierless FIR filters with a minimum adder step and reduced hardware complexity. In International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece. IEEE, 2006. [doi]

@inproceedings{MaskellLP06,
  title = {The design of multiplierless FIR filters with a minimum adder step and reduced hardware complexity},
  author = {Douglas L. Maskell and Jussipekka Leiwo and Jagdish Chandra Patra},
  year = {2006},
  doi = {10.1109/ISCAS.2006.1692658},
  url = {http://dx.doi.org/10.1109/ISCAS.2006.1692658},
  tags = {design complexity, design},
  researchr = {https://researchr.org/publication/MaskellLP06},
  cites = {0},
  citedby = {0},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece},
  publisher = {IEEE},
}