Tunneling-based CMOS Floating Gate Synapse for Low Power Spike Timing Dependent Plasticity

Michele Mastella, Fabio Toso, Giuseppe Sciortino, Enrico Prati, Giorgio Ferrari. Tunneling-based CMOS Floating Gate Synapse for Low Power Spike Timing Dependent Plasticity. In 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2020, Genova, Italy, August 31 - September 2, 2020. pages 213-217, IEEE, 2020. [doi]

Abstract

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