Test generation based on synthesizable VHDL descriptions

Manzer Masud, Maddu Karunaratne. Test generation based on synthesizable VHDL descriptions. In Proceedings of the European Design Automation Conference 1993, EURO-DAC '93 with EURO-VHDL'93, Hamburg, Germany, September 20-24, 1993. pages 446-451, IEEE Computer Society, 1993. [doi]

Abstract

Abstract is missing.