Hardware-simulation correlation of timing error detection performance of software-based error detection mechanisms

Yutaka Masuda, Masanori Hashimoto, Takao Onoye. Hardware-simulation correlation of timing error detection performance of software-based error detection mechanisms. In 22nd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2016, Sant Feliu de Guixols, Spain, July 4-6, 2016. pages 84-89, IEEE, 2016. [doi]

@inproceedings{MasudaHO16-0,
  title = {Hardware-simulation correlation of timing error detection performance of software-based error detection mechanisms},
  author = {Yutaka Masuda and Masanori Hashimoto and Takao Onoye},
  year = {2016},
  doi = {10.1109/IOLTS.2016.7604677},
  url = {http://dx.doi.org/10.1109/IOLTS.2016.7604677},
  researchr = {https://researchr.org/publication/MasudaHO16-0},
  cites = {0},
  citedby = {0},
  pages = {84-89},
  booktitle = {22nd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2016, Sant Feliu de Guixols, Spain, July 4-6, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-1507-8},
}