16.2 A 0.19pJ/b PVT-variation-tolerant hybrid physically unclonable function circuit for 100% stable secure key generation in 22nm CMOS

Sanu K. Mathew, Sudhir Satpathy, Mark A. Anders, Himanshu Kaul, Steven K. Hsu, Amit Agarwal 0001, Gregory K. Chen, R. J. Parker, Ram K. Krishnamurthy, Vivek De. 16.2 A 0.19pJ/b PVT-variation-tolerant hybrid physically unclonable function circuit for 100% stable secure key generation in 22nm CMOS. In 2014 IEEE International Conference on Solid-State Circuits Conference, ISSCC 2014, Digest of Technical Papers, San Francisco, CA, USA, February 9-13, 2014. pages 278-279, IEEE, 2014. [doi]

Authors

Sanu K. Mathew

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Sudhir Satpathy

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Mark A. Anders

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Himanshu Kaul

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Steven K. Hsu

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Amit Agarwal 0001

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Gregory K. Chen

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R. J. Parker

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Ram K. Krishnamurthy

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Vivek De

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