Fault tolerant bit parallel finite field multipliers using LDPC codes

Jimson Mathew, Jawar Singh, Abusaleh M. Jabir, Mohammad Hosseinabady, Dhiraj K. Pradhan. Fault tolerant bit parallel finite field multipliers using LDPC codes. In International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA. pages 1684-1687, IEEE, 2008. [doi]

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