R. Mathur, R. Sisodia, A. Chen, A. Singh, S. Thyagarajan, A. Cubeta, C. Andrieux, A. Sowden, Y. K. Chong. A 7GHz High-Bandwidth 1R-1RW SRAM for Arm HPC Processor in 3nm Technology. In IEEE Symposium on VLSI Technology and Circuits 2024, Honolulu, HI, USA, June 16-20, 2024. pages 1-2, IEEE, 2024. [doi]
@inproceedings{MathurSCSTCASC24,
title = {A 7GHz High-Bandwidth 1R-1RW SRAM for Arm HPC Processor in 3nm Technology},
author = {R. Mathur and R. Sisodia and A. Chen and A. Singh and S. Thyagarajan and A. Cubeta and C. Andrieux and A. Sowden and Y. K. Chong},
year = {2024},
doi = {10.1109/VLSITechnologyandCir46783.2024.10631403},
url = {https://doi.org/10.1109/VLSITechnologyandCir46783.2024.10631403},
researchr = {https://researchr.org/publication/MathurSCSTCASC24},
cites = {0},
citedby = {0},
pages = {1-2},
booktitle = {IEEE Symposium on VLSI Technology and Circuits 2024, Honolulu, HI, USA, June 16-20, 2024},
publisher = {IEEE},
isbn = {979-8-3503-6146-9},
}