Twin register architecture for an AI processor

Tsukasa Matoba, Mitsuyoshi Okamura, Takeshi Aikawa, Kenji Minagawa, Mitsuo Saito, Ken-ichi Maeda, Takeshi Takamiya. Twin register architecture for an AI processor. In IEEE International Workshop on Tools for Artificial Intelligence: Architectures, Languages and Algorithms, TAI 1989, Fairfax, VA, USA, October 23-25, 1989. pages 168-173, IEEE, 1989. [doi]

@inproceedings{MatobaOAMSMT89,
  title = {Twin register architecture for an AI processor},
  author = {Tsukasa Matoba and Mitsuyoshi Okamura and Takeshi Aikawa and Kenji Minagawa and Mitsuo Saito and Ken-ichi Maeda and Takeshi Takamiya},
  year = {1989},
  doi = {10.1109/TAI.1989.65317},
  url = {http://dx.doi.org/10.1109/TAI.1989.65317},
  researchr = {https://researchr.org/publication/MatobaOAMSMT89},
  cites = {0},
  citedby = {0},
  pages = {168-173},
  booktitle = {IEEE International Workshop on Tools for Artificial Intelligence: Architectures, Languages and Algorithms, TAI 1989, Fairfax, VA, USA, October 23-25, 1989},
  publisher = {IEEE},
  isbn = {0-8186-1984-8},
}