A New Array Architecture for Parallel Testing in VLSI Memories - researchr publication authors

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Yoshio Matsuda, Kazutami Arimoto, Masaki Tsukude, Tsukasa Oishi, Kazuyasu Fujishima. A New Array Architecture for Parallel Testing in VLSI Memories. In Proceedings International Test Conference 1989, Washington, D.C., USA, August 1989. pages 322-326, IEEE Computer Society, 1989.

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