Polylogarithmic time simulation of reconfigurable row/column buses by static buses

Susumu Matsumae. Polylogarithmic time simulation of reconfigurable row/column buses by static buses. In 24th IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2010, Atlanta, Georgia, USA, 19-23 April 2010 - Workshop Proceedings. pages 1-6, IEEE, 2010. [doi]

Abstract

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