A high-performance architecture for variable length instructions

Hidekazu Matsumoto, Tadaaki Bandoh, Kotaro Hirasawa, Takeshi Kato. A high-performance architecture for variable length instructions. Systems and Computers in Japan, 16(3):19-28, 1985. [doi]

@article{MatsumotoBHK85,
  title = {A high-performance architecture for variable length instructions},
  author = {Hidekazu Matsumoto and Tadaaki Bandoh and Kotaro Hirasawa and Takeshi Kato},
  year = {1985},
  doi = {10.1002/scj.4690160303},
  url = {http://dx.doi.org/10.1002/scj.4690160303},
  researchr = {https://researchr.org/publication/MatsumotoBHK85},
  cites = {0},
  citedby = {0},
  journal = {Systems and Computers in Japan},
  volume = {16},
  number = {3},
  pages = {19-28},
}