Akira Matsuoka, Yo Kumano, Tomohiro Nezuka, Yoshikazu Furuta, Tetsuya Iizuka. A 79.2-μW 19.5-kHz-BW 94.8-dB-SNDR Fully Dynamic DT ΔΣ ADC Using CLS-Assisted FIA With Sampling Noise Cancellation. IEEE Trans. Circuits Syst. II Express Briefs, 70(8):2759-2763, August 2023. [doi]
Abstract is missing.