High-Level Hierachical HDL Synthesis of Pipelined FPGA-Based Circuits Using Synchronous Modules - researchr publication

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R. Bruce Maunder, Zoran A. Salcic, George G. Coghill. High-Level Hierachical HDL Synthesis of Pipelined FPGA-Based Circuits Using Synchronous Modules. In Patrick Lysaght, James Irvine, Reiner W. Hartenstein, editors, Field-Programmable Logic and Applications, 9th International Workshop, FPL 99, Glasgow, UK, August 30 - September 1, 1999, Proceedings. Volume 1673 of Lecture Notes in Computer Science, pages 377-384, Springer, 1999.

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