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Design of Low Power 5-Bit Hybrid Flash ADC

S. M. Mayur, R. K. Siddharth, Kumar Y. B. Nithin, M. H. Vasantha. Design of Low Power 5-Bit Hybrid Flash ADC. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016, Pittsburgh, PA, USA, July 11-13, 2016. pages 343-348, IEEE, 2016. [doi]

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