A Scalable and Low-Power FPGA-Aware Network-on-Chip Architecture - researchr publication authors

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Somnath Mazumdar, Alberto Scionti, Antoni Portero, Jan Martinovic, Olivier Terzo. A Scalable and Low-Power FPGA-Aware Network-on-Chip Architecture. In Leonard Barolli, Olivier Terzo, editors, Complex, Intelligent, and Software Intensive Systems - Proceedings of the 11th International Conference on Complex, Intelligent, and Software Intensive Systems (CISIS-2017), Torino, Italy, July 10-12, 2017. Volume 611 of Advances in Intelligent Systems and Computing, pages 407-420, Springer, 2017. [doi]

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