Design of a Highly Pipelined 2nd Order IIR Filter Chip

O. C. McNally, John V. McCanny, Roger F. Woods. Design of a Highly Pipelined 2nd Order IIR Filter Chip. In Arne Halaas, Peter B. Denyer, editors, VLSI 91, Proceedings of the IFIP TC10/WG 10.5 International Conference on Very Large Scale Integration, Edinburgh, Scotland, 20-22 August, 1991. Volume A-1 of IFIP Transactions, pages 19-28, North-Holland, 1991.

@inproceedings{McNallyMW91,
  title = {Design of a Highly Pipelined 2nd Order IIR Filter Chip},
  author = {O. C. McNally and John V. McCanny and Roger F. Woods},
  year = {1991},
  tags = {C++, design},
  researchr = {https://researchr.org/publication/McNallyMW91},
  cites = {0},
  citedby = {0},
  pages = {19-28},
  booktitle = {VLSI 91, Proceedings of the IFIP TC10/WG 10.5 International Conference on Very Large Scale Integration, Edinburgh, Scotland, 20-22 August, 1991},
  editor = {Arne Halaas and Peter B. Denyer},
  volume = {A-1},
  series = {IFIP Transactions},
  publisher = {North-Holland},
  isbn = {0-444-89019-X},
}