A Parallel Algorithm for VLSI Test Generation

Muralidhar Medidi, A. Sagahyroon. A Parallel Algorithm for VLSI Test Generation. In M. H. Hamza, editor, Proceedings of the Seventh IASTED/ISMM International Conference on Parallel and Distributed Computing and Systems, Washington, D.C., USA, October 19-21, 1995. pages 280-282, IASTED/ACTA Press, 1995.

@inproceedings{MedidiS95,
  title = {A Parallel Algorithm for VLSI Test Generation},
  author = {Muralidhar Medidi and A. Sagahyroon},
  year = {1995},
  tags = {testing},
  researchr = {https://researchr.org/publication/MedidiS95},
  cites = {0},
  citedby = {0},
  pages = {280-282},
  booktitle = {Proceedings of the Seventh IASTED/ISMM International Conference on Parallel and Distributed Computing and Systems, Washington, D.C., USA, October 19-21, 1995},
  editor = {M. H. Hamza},
  publisher = {IASTED/ACTA Press},
}